With RISC-V being as slow as it is, where is the use beyond proof of concept?
Impressive. I would imagine it is very difficult to get native performance without ISA extensions like Apple had to do for TSO and other awkward x86isms.
I would guess someone will make a RISC-V extension for that stuff eventually, though I haven’t seen anyone propose one yet.
puts entirety of x86_64 into a RISCV ISA extension
Another awesome stopgap measure like Proton before the Linux and RISC-V standards take over the market!
This is a Linux x86-64 to Linux RISC-V emulator. It will not execute non-Linux code or execute code outside Linux.
The Linux system call interface is the same on both sides so, when it encounters a Linux system call in the x86-64 code, it makes that call directly into the RISC-V host kernel. It is only emulating the user space. This makes it faster.
