Taiwan Semiconductor Manufacturing Co. (TSMC) will produce 3 nanometer chips at its second, still-under-construction plant in Kumamoto, Japan, the company announced Thursday.
Just a reminder for anyone that thinks 3nm chips means the transistors themselves are only 3nm, they are bigger than that. 3nm is the marketing name for the fab process they are using.
Close, except it’s not a marketing term. It’s part of a published IEEE standard.
The actual gate pitch and metal pitch vary by manufacturer and process type.
From Wikipedia:
The term “3 nanometer” has no direct relation to any actual physical feature (such as gate length, metal pitch, or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by IEEE Standards Association Industry Connection, a 3 nm node is expected to have a contacted gate pitch of 48 nanometers, and a tightest metal pitch of 24 nanometers.[12]
Just a reminder for anyone that thinks 3nm chips means the transistors themselves are only 3nm, they are bigger than that. 3nm is the marketing name for the fab process they are using.
Close, except it’s not a marketing term. It’s part of a published IEEE standard.
The actual gate pitch and metal pitch vary by manufacturer and process type.
From Wikipedia: